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Exactly-once transaction semantics for fault tolerant FPGA based transaction systems
Exactly-once transaction semantics for fault tolerant FPGA based transaction systems
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机译:基于容错FPGA的事务系统的一次精确事务语义
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#$%^&*AU2019201592A120191010.pdf#####1002480106 ABSTRACT EXACTLY-ONCE TRANSACTION SEMANTICS FOR FAULT TOLERANT FPGA BASED TRANSACTION SYSTEMS 5 This disclosure relates generally to methods and systems for providing exactlyonce transaction semantics for fault tolerant FPGA based transaction systems. The systems comprise middleware components in a server as well as client end. The server comprises Hosts and FPGAs. The FPGAs control transaction execution 10 (the application processing logic also resides in the FPGA) and provide fault tolerance with high performance by means of a modified TCP implementation. The Hosts buffer and persist transaction records for failure recovery and achieving exactly-once transaction semantics. The monitoring and fault detecting components are distributed across the FPGA's and Hosts. Exactly-once 15 transaction semantics is implemented without sacrificing performance by switching between a high performance mode and a conservative mode depending on component failures. PCIE switches for connectivity between FPGAs and Hosts ensure FPGAs are available even if Hosts fail. When FPGA's provide higher processing elements and memory, the Hosts may be eliminated. 20 To be published with FIG.2A1/24 Client/ Client/ Server /System Client Application Client/ Client Appli::ation Client Application _ EQUEST (CLID, RN) RESPONSE (CLID, RN)' NOTIFICATION (CLID, RN, N) NOTIFICATION (CLID, RN, N+1) NOTIFICATION (CLID, RN, N+2) ACKNOWLEDGE RESPONSE (CLID,RN,RN) ACKNOWLEDGE NOTIFICATION (CLID,RNN ,__-----ACKNOWLEDGE NOTIFICATION (CLID,RNN+l) ACKNOWLEDGENOTIFICATION(CLID,RN,N+2) FIG.1 (PRIOR ART)
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