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BURIED CONTACT TO PROVIDE REDUCED VFET FEATURE-TO-FEATURE TOLERANCE REQUIREMENTS

机译:隐式接触,以提供降低的VFET特性到特性公差要求

摘要

Embodiments are directed to a semiconductor device. The semiconductor device includes a first semiconductor fin formed opposite a surface of a first active region of a substrate. The semiconductor device further includes a second semiconductor fin formed opposite a surface of a second active region of the substrate. The semiconductor device further includes a self-aligned buried contact formed over portions of the first active region and the second active region and between the first semiconductor fin and the second semiconductor fin.
机译:实施例涉及半导体器件。该半导体器件包括形成为与衬底的第一有源区的表面相对的第一半导体鳍。该半导体器件还包括与衬底的第二有源区的表面相对地形成的第二半导体鳍。半导体器件还包括自对准掩埋接触,该自对准掩埋接触形成在第一有源区域和第二有源区域的部分上方并且在第一半导体鳍和第二半导体鳍之间。

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