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MEMORY DEVICE TO PROVIDE IN-MEMORY COMPUTATION FUNCTIONALITY FOR A PIPELINE CIRCUIT ARCHITECTURE

机译:用于提供管线电路体系结构的内存计算功能的存储器

摘要

Techniques and mechanisms for configuring a memory device to perform a sequence of in-memory computations. In an embodiment, a memory device includes a memory array and circuitry, coupled thereto, to perform data computations based on the data stored at the memory array. Based on instructions received at the memory device, control circuitry is configured to enable an automatic performance of a sequence of operations. In another embodiment, the memory device is coupled in an in-series arrangement of other memory devices to provide a pipeline circuit architecture. The memory devices each function as a respective stage of the pipeline circuit architecture, where the stages each perform respective in-memory computations. Some or all such stages each provide a different respective layer of a neural network.
机译:用于配置存储设备以执行一系列内存中计算的技术和机制。在一个实施例中,一种存储器设备包括存储器阵列和耦合到存储器阵列的电路,以基于存储在存储器阵列处的数据执行数据计算。基于在存储设备处接收到的指令,控制电路被配置为使得能够自动执行一系列操作。在另一个实施例中,该存储设备以其他存储设备的串联布置耦合,以提供流水线电路架构。每个存储设备用作流水线电路体系结构的相应阶段,其中每个阶段执行各自的内存中计算。这些阶段中的一些或全部每个阶段提供神经网络的不同的相应层。

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