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UNIFIED ACCELERATOR FOR CLASSICAL AND POST-QUANTUM DIGITAL SIGNATURE SCHEMES IN COMPUTING ENVIRONMENTS

机译：计算环境中经典和量化后数字签名方案的统一加速器

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摘要

A mechanism is described for facilitating unified accelerator for classical and post-quantum digital signature schemes in computing environments, according to one embodiment. A method of embodiments, as described herein, includes unifying classical cryptography and post-quantum cryptography through a unified hardware accelerator hosted by a trusted platform of the computing device. The method may further include facilitating unification of a first finite state machine associated with the classical cryptography and a second finite state machine associated with the post-quantum cryptography though one or more of a single the hash engine, a set of register file banks, and a modular exponentiation engine.

机译：根据一个实施例，描述了一种用于促进计算环境中的经典和量子后数字签名方案的统一加速器的机制。如本文中所描述的实施例的方法包括通过由计算设备的可信平台托管的统一硬件加速器来统一经典密码术和量子后密码学。该方法还可以包括通过单个散列引擎，一组寄存器文件库和/或单个散列引擎中的一个或多个，促进与经典密码学关联的第一有限状态机和与后量子密码学关联的第二有限状态机的统一。模块化幂运算引擎。

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公开/公告号US2019319804A1

专利类型
公开/公告日2019-10-17

原文格式PDF
申请/专利权人 INTEL CORPORATION;
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申请/专利号US201916456187
发明设计人 SANU MATHEW;MANOJ SASTRY;SANTOSH GHOSH;VIKRAM SURESH;ANDREW H. REINDERS;RAGHAVAN KUMAR;RAFAEL MISOCZKI;
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申请日2019-06-28
分类号H04L9/32;G06F21/76;H04L9/08;
国家 US
入库时间 2022-08-21 12:12:19

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