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INFORMATION PROCESSING APPARATUS, TIMING ERROR ANALYZING PROGRAM, AND TIMING ERROR ANALYZING METHOD

机译:信息处理装置,时序误差分析程序以及时序误差分析方法

摘要

To facilitate an investigation work for a countermeasure plan for resolving a timing error.SOLUTION: An information processing apparatus 1 extracts a design value regarding a delay amount of a signal path and a feature amount which is an input obtained when the design value is output for learning of a machine learning model. Then, the information processing apparatus 1 estimates a correct value of the design vale based on the machine learning model which learnt a relationship between the design value and the feature amount. Then, the information processing apparatus 1 stores a comparison result obtained by comparing the design value and the correct value. The information processing apparatus 1 generates a comparison result list including a countermeasure plan for cancelling a timing error in response to the generated comparison result. Then, the information processing apparatus 1 compacts signal paths included in the comparison result list by each design block, generates an error list including information indicating the signal paths compacted by each design block and the countermeasure plan, and outputs the error list.SELECTED DRAWING: Figure 5
机译:为了解决用于解决定时误差的对策计划的调查工作。解决方案:信息处理设备1提取与信号路径的延迟量和特征量有关的设计值,该特征量是在输出设计值时获得的输入。学习机器学习模型。然后,信息处理设备1基于学习了设计值和特征量之间的关系的机器学习模型来估计设计值的正确值。然后,信息处理设备1存储通过比较设计值和正确值而获得的比较结果。信息处理设备1响应于所生成的比较结果来生成包括用于消除定时误差的对策计划的比较结果列表。然后,信息处理设备1按每个设计块压缩比较结果列表中包括的信号路径,生成包括指示由每个设计块和对策计划压缩的信号路径的信息的错误列表,并输出该错误列表。图5

著录项

  • 公开/公告号JP2019036199A

    专利类型

  • 公开/公告日2019-03-07

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP20170157943

  • 发明设计人 HASHIMOTO MICHITAKA;

    申请日2017-08-18

  • 分类号G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-21 12:20:06

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