Described embodiments provide systems and methods for verifying functionality of a circuit design under test (DUT). A verification method includes generating a transaction stream for a communication interface of the DUT. The transaction stream includes one or more transactions that are associated with commands of the communication interface and test data associated with the commands. The transaction stream is sent to the DUT via the communication interface. Responses sent from the DUT via the communication interface are monitored. The transactions and the responses are classified based upon one or more characteristics of the transactions and the responses. A graphical representation of the transactions and responses is generated based upon the classification.
展开▼
