Power line impedance stabilization modeling circuit for electromagnetic environment test of standard compact advanced satellite

• 1. 用于稳定性分析的变流器并网通用序阻抗模型及建模方法 [P] . 中国专利： CN111555339B . 2022.01.18
• 2. 用于稳定性分析的变流器并网通用序阻抗模型及建模方法 [P] . 中国专利： CN111555339A . 2020-08-18
• 3. Power line impedance stabilization modeling circuit for electromagnetic environment test of standard compact advanced satellite [P] . 韩国专利： KR101867418B1 . 2018-06-15

  机译： 用于标准紧凑型高级卫星电磁环境测试的电力线阻抗稳定建模电路

• 4. Compact, low power advanced encryption standard circuit [P] . 美国专利： US9843441B2 . 2017-12-12

  机译： 紧凑的低功耗高级加密标准电路

• 5. COMPACT, LOW POWER ADVANCED ENCRYPTION STANDARD CIRCUIT [P] . 美国专利： US2015086007A1 . 2015-03-26

  机译： 紧凑，低功耗高级加密标准电路

• 1. Non-destructive experimental testing and modeling of electrical impedance behavior of untreated and treated ultra-soft clayey soils [J] . Aram M.Raheem, Cumaraswamy Vipulanandan, Mohammad S.Joshaghani 岩石力学与岩土工程学报（英文版） . 2017,第003期
• 2. GA-BASED MAXIMUM POWER DISSIPATION ESTIMATION OF VLSI SEQUENTIAL CIRCUITS OF ARBITRARY DELAY MODELS [J] . Lu Junming, Lin Zhenghui 电子科学学刊（英文版） . 2002,第004期
• 3. Effects of open-circuit voltage tests and models on state-of-charge estimation for batteries in highly variable temperature environments: Study case nano-satellites [J] . Knap Vaclav, Stroe Daniel-Ioan Journal of power sources . 2021,第Juna30期
• 4. Implementation of nanoscale double-gate CMOS circuits using compact advanced transport models [J] . Muthupandian Cheralathan, Esteban Contreras, Joaquin Alvarado, Microelectronics journal . 2013,第2期
• 5. Compact Modeling as a Bridge between Scaled Semiconductor Technologies and Advanced Designs of the Integrated Circuits [J] . A.B. Bhattacharyya, Wladek Grabinski IETE Journal of Research . 2012,第3期
• 6. Compact modeling of power devices embedded in advanced low-power CMOS circuits [C] . Y. Hirano, H. Kikuchihara, T. Iizuka, International Conference on Simulation of Semiconductor Processes and Devices . 2016
• 7. On low power and circuit parameter independent tests, and a new method of test response compaction. [D] . Howard, Joseph Michael. 2010
• 8. Application of Multi-Branch Cauer Circuits in the Analysis of Electromagnetic Transducers Used in Wireless Transfer Power Systems [O] . Milena Kurzawa, Cezary Jędryczka, Rafał M. Wojciechowski 2020
• 9. Design and Testing of a Low-Tech DEW Generator for Determining Electromagnetic Immunity of Standard Electronic Circuits [O] . Libor Dražan, René Križan, Miroslav Popela 2021

• 1. Modelling of Impedance Matching Circuit with Digital Capacitor in Narrowband Power Line Communication [J] . Chin Pin Rui ,Nader Nassif Barsoum ,Arthur Wong Kok Ming . 能源与动力工程 . 2014,第001期
• 2. Compensation of Unbalanced Impedance of Asymmetric Wind Power PMSG Compensated by External Circuits in Series [J] . Yashan Hu ,Z.Q.Zhu ,Milijana Odavic . 中国电工技术学会电机与系统学报(英文) . 2017,第2期
• 3. Analytical and Numerical Model Confrontation for Transfer Impedance Extraction in Three-Dimensional Radio Frequency Circuits [J] . Olivier Valorge ,Fengyuan Sun ,Jean-Etienne Lorival . 电路与系统（英文） . 2012,第2期
• 4. 刍议卫星通信地球站的电磁环境测试 [C] . 韩诚亮 . 四川省通信学会二O一二年年会 . 2012
• 5. 高级加密标准的简洁紧凑型硬件实现 [A] . 余娜敏 . 2006