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DESIGN OF NOC BASED MANY CORE PARALLEL PROCESSING PLATFORM
DESIGN OF NOC BASED MANY CORE PARALLEL PROCESSING PLATFORM
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机译：基于NOC的多核并行处理平台的设计
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摘要
The demand for computation capacity is increasing so that processing speed can be reduced and hence many core parallel processing has become a compelling choice for computation-intensive application. The interconnection of processing cores can be done with the help of networks-on-chip (NoC) architecture. The aim of the present discloser is to design NoC based many core parallel processing architecture with low power consumption, less area and low latency. This can be done by using virtual channel routing mechanism. In this project the complicated 4G system is divided in to several tasks and demonstrated on this NoC platform.
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