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Semiconductor storage apparatus and memory system comprising memory cell holding data value of multiple bits
Semiconductor storage apparatus and memory system comprising memory cell holding data value of multiple bits
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机译：包括存储多位数据值的存储单元的半导体存储设备和存储系统
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摘要
According to one embodiment, a semiconductor storage apparatus includes a memory cell array and a read circuit. The memory cell array includes a memory cell which is connected to a word line. A threshold voltage of the memory cell corresponds to a data value of multiple bits. The read circuit receives designation of one bit among the multiple bits, applies a first reading voltage and a second reading voltage corresponding to the designated bit to the word line, senses ON or OFF of the memory cell for each reading voltage, and outputs a first sensed value and a second sensed value after performing the sensing for each reading voltage. The first sensed value is a sensing result in a case where the first reading voltage is applied. The second sensed value is a sensing result in a case where the second reading voltage is applied.
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