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CONVERSION OF A SYNCHRONOUS FPGA DESIGN INTO AN ASYNCHRONOUS FPGA DESIGN
CONVERSION OF A SYNCHRONOUS FPGA DESIGN INTO AN ASYNCHRONOUS FPGA DESIGN
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机译:将同步FPGA设计转换为异步FPGA设计
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摘要
Methods and systems for converting synchronous circuit designs to asynchronous circuit designs are described. A method may include converting a synchronous circuit design to an asynchronous dataflow design. Functional characteristics of the synchronous circuit design may be determined. The synchronous circuit design may include multiple synchronous logic blocks and a number of connection boxes. Each synchronous logic block may be converted, based on functional characteristics, to corresponding asynchronous dataflow logic blocks. The corresponding asynchronous dataflow logic blocks may provide corresponding asynchronous dataflow logic functions that may use protocol signals. Each connection box, based on the functional characteristics, may be converted to programmable switch points and programmable switches.
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