首页>
外国专利>
Design and Implementation of Hybrid Network-On-Chip Scheme for Minimization of Latency and Power
Design and Implementation of Hybrid Network-On-Chip Scheme for Minimization of Latency and Power
展开▼
机译：最小化延迟和功耗的混合片上网络方案的设计与实现
展开▼
页面导航
摘要
著录项
相似文献
摘要
ABSTRACT The present invention relates to a design and implementation of hybrid network-on-chip scheme for minimization of latency and power. A hybrid router which combines circuit switching and packet switching with virtual channels for on-chip networks in order to efficiently transfer streaming and best-effort traffics in specific applications. Time Division Multiplexing (TDM) technique and clock-gating scheme are used to take the benefits from the flexibility and throughput advantage of packet-switched router and superior power efficiency performance of circuit-switching. Synthesis and simulation results show that the proposed router has a gain of optimization in latency and average power consumption compared to either of the routers with single switching technique, with a slight growth of 6.8% in area overhead, while the virtual channels increase the network bandwidth by 26%. Following invention is described in detail with the help of Figure 1 of sheet 1 shows the diagram for the overview architecture of the proposed hybrid router, Figure 2 of sheet 1 shows the detailed diagram for vc_x module and Figure 3 of sheet 2 shows the diagram for output controller (OC).
展开▼
