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Method and architecture for reconfigurable circuit for frequency conversion in the time domain channel random access systems, LTE and LTE -

机译:在时域信道随机接入系统中LTE和LTE的用于频率转换的可重配置电路的方法和架构-

摘要

Method and architecture for reconfigurable circuit for frequency conversion in the time domain channel random access systems, LTE and LTE -, low computational complexity, is applied to the receiver of the physical channel for random accesses PRACH union rise, Qu And builds the eNodeB LTE and LTE Systems - A,Used in the extraction of signals containing preambles of random access, by means of a translation operation frequency of the time domain. The operation transfers the signal PRACH from his position in the band to band - pass basis.The architecture of reconfigurable integrated circuit is fully described by the basic logic elements such as flip flops, adders, multipliers, multiplexers, logic gates (and, or, etc.) and Roma, can be implemented in various models of FPGA.
机译:低时复杂度的时域信道随机接入系统LTE和LTE中用于频率转换的可重配置电路的方法和架构-用于随机接入的物理信道的接收器PRACH联合上升,Qu And构建eNodeB LTE和LTE系统-A,用于通过时域的转换操作频率提取包含随机接入前导的信号。该操作将信号PRACH从他在频带中的位置转移到频带-通带基础上。可重配置集成电路的体系结构由基本逻辑元件(如触发器,加法器,乘法器,多路复用器,逻辑门(以及,或等)和Roma,可以在各种型号的FPGA中实现。

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