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Latch circuit and latch circuit array including the same
Latch circuit and latch circuit array including the same
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机译：锁存电路和包括该锁存电路的锁存电路阵列
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摘要
A latch circuit may include: first to Nth storage nodes where N is an even number equal to or more than four; first to Nth pairs of transistors each including a PMOS transistor and an NMOS transistor which are coupled in series through a corresponding storage node among the first to Nth storage nodes, wherein each of the first to Nth storage nodes is coupled to a gate of the NMOS transistor of the transistor pair at the previous stage and a gate of the PMOS transistor of the transistor pair at the next stage; first to Nth PMOS transistors suitable for driving corresponding storage nodes among the first to Nth storage nodes to a high level; and first to Nth NMOS transistors suitable for driving corresponding storage nodes among the first to Nth storage nodes to a low level.
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