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Adaptive correction of interleaving errors in time-interleaved analog-to-digital converters
Adaptive correction of interleaving errors in time-interleaved analog-to-digital converters
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机译：时间交错的模数转换器中交错误差的自适应校正
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摘要
A system includes an interleaved analog-to-digital converter (ADC) comprising a plurality of sub-ADCs, where each of the plurality of sub-ADCs has an adjustable timing. The system includes a data analyzer that analyzes an output of the interleaved ADC, that estimates timing mismatches of the plurality of sub-ADCs, and that corrects the timing mismatches by adjusting the adjustable timing of one or more of the plurality of sub-ADCs based on the estimated timing mismatches.
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