首页> 外国专利> Production of semiconductor integrated circuit device using the grain size and grain size distribution evaluation method as well as that of the metal layer How

Production of semiconductor integrated circuit device using the grain size and grain size distribution evaluation method as well as that of the metal layer How

机译:使用晶粒尺寸和晶粒尺寸分布评估方法以及金属层的制造方法生产半导体集成电路器件

摘要

PROBLEM TO BE SOLVED: To achieve a method of evaluating a crystal particle size and a particle size distribution in a metal layer nondestructively and online.SOLUTION: The method includes: a step A of acquiring a diffraction peak obtained by X-ray irradiation to a metal layer which has a crystalline texture and has the diffraction peak in a specific orientation with respect to X rays; a step B of obtaining an area average column length and a volume average column length on the basis of the diffraction peak; and a step C of obtaining a logarithmic normal distribution of a crystal particle size from the area average column length and the volume average column length.
机译:解决的问题:实现一种无损在线地评估金属层中晶体粒径和粒径分布的方法。解决方案:该方法包括:步骤A,获取通过X射线辐照获得的衍射峰。具有结晶织构并且在相对于X射线的特定取向上具有衍射峰的金属层;步骤B:根据衍射峰求出面积平均柱长和体积平均柱长;步骤C,从面积平均柱长和体积平均柱长求出结晶粒径的对数正态分布。

著录项

  • 公开/公告号JP5747406B2

    专利类型

  • 公开/公告日2015-07-15

    原文格式PDF

  • 申请/专利权人 国立大学法人茨城大学;

    申请/专利号JP20110022414

  • 发明设计人 稲見 隆;大貫 仁;

    申请日2011-02-04

  • 分类号G01N23/20;H01L21/66;H01L21/3205;H01L21/768;H01L23/522;

  • 国家 JP

  • 入库时间 2022-08-21 15:32:01

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