首页>
外国专利>
Semiconductor arrangement with a wide conductor track in the outermost circuit
Semiconductor arrangement with a wide conductor track in the outermost circuit
展开▼
机译：最外层电路中具有宽导体走线的半导体装置
展开▼
页面导航
摘要
著录项
相似文献
摘要
Semiconductor arrangement in which an electronic semiconductor element (20), which has connections (22) in a checkerboard pattern, is mounted by soldering on a multilayer printed circuit board (10), which has conductor tracks (16) and connection areas (15), the semiconductor arrangement comprises: a first conductor track (16b) which forms part of the conductor tracks (16); a first connection surface (15b) which forms part of the connection surfaces (15) and is linked to the first conductor track (16b); a first connection (22b) which forms part of the connections (22) and can be connected to the first connection surface (15b); a second conductor track (16a) which forms part of the conductor tracks (16) and is wider than the first conductor track (16b); a second connection area (15a) which forms part of the connection areas (15) and is linked to the second conductor track (16a); and a second connection (22a) which forms part of the connections (22) and can be connected to the second connection surface (15a), wherein: two of the connection surfaces (15) lying next to one another are spaced apart from one another such that only one of the first conductor tracks ( 16b) can pass between them, the second connection surface (15a) is formed in an outermost line (L1) of at least the uppermost layer (11) of the multilayer printed circuit board (10), and the second connection (22a) under the connections (22) of the outermost one Line (L1) is assigned.
展开▼
