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The die/di package which for the direct surface implementation is exposed

机译:裸露/直接封装的裸露/裸露封装

摘要

A packaged semiconductor device includes a semiconductor die including a substrate having a topside including active circuitry and a bottomside with at least one backside metal layer directly attached. A package including a molding material having a die pad and a plurality of leads is encapsulated within the molding material, wherein the leads include an exposed portion that includes a bonding portion. The topside of the semiconductor die is attached to the die pad, and the package includes a gap that exposes the backside metal layer along a bottom surface of the package. Bond wires couple pads on the topside of the semiconductor die to the leads. The bonding portions, the molding material along the bottom surface of the package, and the backside metal layer are all substantially planar to one another.
机译:封装的半导体器件包括半导体管芯,该半导体管芯包括衬底,该衬底具有顶面和底面,该顶面包括有源电路,该底面具有直接附接的至少一个背面金属层。包括模制材料的封装被封装在模制材料内,该模制材料具有管芯焊盘和多个引线,其中,引线包括暴露部分,该暴露部分包括结合部分。半导体管芯的顶侧附接到管芯焊盘,并且封装包括沿封装的底表面暴露背面金属层的间隙。键合线将半导体管芯顶部的焊盘耦合到引线。结合部分,沿着封装的底表面的模制材料以及背面金属层彼此基本上是平面的。

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