首页> 外国专利> FUNCTIONAL STRUCTURE OF THE PRIOR adder f1 (ΣCD) CONDITIONAL 'j' DISCHARGE serializer MULTIPLIER fΣ (Σ), is implementing procedures 'INTERPRETATION' argument partial products with a structure of arguments multiplicand mj f (2n) and the multiplier ni f (2n) The positional FORMAT 'additional code' and the formation of subtotals 1,2Sj h1 f (2n) in the position FORMAT 'additional code RU' (OPTIONS RUSSIAN LOGIC)

FUNCTIONAL STRUCTURE OF THE PRIOR adder f1 (ΣCD) CONDITIONAL 'j' DISCHARGE serializer MULTIPLIER fΣ (Σ), is implementing procedures 'INTERPRETATION' argument partial products with a structure of arguments multiplicand mj f (2n) and the multiplier ni f (2n) The positional FORMAT 'additional code' and the formation of subtotals 1,2Sj h1 f (2n) in the position FORMAT 'additional code RU' (OPTIONS RUSSIAN LOGIC)

机译:先验加法器f1(ΣCD)的功能结构条件“ j”放电串行化器MULTIPLIERfΣ(Σ),正在实现具有参数multiplicand [mj] f(2n)和乘数[ni]的结构的“ INTERPRETATION”参数部分乘积。 f(2n)位置格式“附加代码”和小数[1,2Sj h1] f(2n)在位置格式“附加代码RU”中的形成(OPTIONS RUSSIAN LOGIC)

摘要

FIELD: computer engineering.;SUBSTANCE: group of inventions relates to computer engineering and can be used in designing parallel-serial multiplier with input arguments of terms [mj]f(2n) and [ni]f(2n) in “complementary code” format. In one version, structure is realised using logic elements AND, OR, NOT, AND-NOT, OR-NOT.;EFFECT: high efficiency of converting input arguments.;2 cl
机译:领域:一组发明涉及计算机工程,并且可以用于设计输入项为[m j ] f(2 n )和[n i ] f(2 n )的格式为“互补代码”。在一个版本中,结构是使用逻辑元素AND,OR,NOT,AND-NOT,OR-NOT实现的;效果:转换输入自变量的效率很高; 2 cl

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