首页> 外国专利> Anti-fuse, anti-fuse circuit including the same, and method of fabricating the anti-fuse

Anti-fuse, anti-fuse circuit including the same, and method of fabricating the anti-fuse

机译:反熔丝,包括该反熔丝的反熔丝电路以及制造该反熔丝的方法

摘要

Provided are an anti-fuse, an anti-fuse circuit, and a method of fabricating the anti-fuse. The anti-fuse includes a semiconductor substrate, an isolation region, a channel diffusion region, a gate oxide layer, and a gate electrode. The semiconductor substrate includes a top surface and a bottom portion, the bottom portion of the semiconductor substrate having a first conductivity type. The isolation region is disposed inward from the top surface of the semiconductor substrate to a first depth. The channel diffusion region is disposed inward from the top surface of the semiconductor substrate to a second depth, the second depth located at a depth where the channel diffusion region meets an upper boundary of the bottom portion of the semiconductor substrate. The channel diffusion region is surrounded by the isolation region, the first depth is a greater distance from the top surface of the semiconductor substrate than the second depth, and the channel diffusion region has a second conductivity type opposite to the first conductivity type. The gate oxide layer is disposed on the channel diffusion region, and the gate electrode is disposed on the gate oxide layer to cover a top surface of the gate oxide layer.
机译:提供了一种反熔丝,一种反熔丝电路以及一种制造反熔丝的方法。所述反熔丝包括半导体衬底,隔离区,沟道扩散区,栅氧化物层和栅电极。半导体衬底包括顶表面和底部,半导体衬底的底部具有第一导电类型。隔离区域从半导体衬底的顶表面向内设置到第一深度。沟道扩散区从半导体衬底的顶表面向内设置到第二深度,第二深度位于沟道扩散区与半导体衬底的底部的上边界相交的深度处。沟道扩散区被隔离区围绕,第一深度到半导体衬底的顶表面的距离大于第二深度,并且沟道扩散区具有与第一导电类型相反的第二导电类型。栅氧化物层设置在沟道扩散区域上,并且栅电极设置在栅氧化物层上以覆盖栅氧化物层的顶表面。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号