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A method/architecture for processing requests in a bus architecture that includes at least two master devices an at least one slave device
A method/architecture for processing requests in a bus architecture that includes at least two master devices an at least one slave device
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机译：一种在总线架构中处理请求的方法/架构，该架构包括至少两个主设备和至少一个从设备
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摘要
A method/architecture for processing requests in a bus architecture that includes at least two master devices (301a, 301b) and at least one slave device (305b), each slave device having an optimiser (311b) includes the steps of a first master device sending a write request to the slave device to the bus, the generation of a fence indicator associated with the write request, the fence indicator indicating that the write request should be completed before subsequently issued requests, sending the fence indicated to the or each optimiser, each optimiser processing all of its request issued before the write request with which the fence indicator is associated, the write request being processed and each optimiser deferring processing of any requests from at least the first master device issued after the write request with which the fence indicator is associated and each optimiser outputting in response to processing the requests issued before the write request (the optimiser associated with the write request also competing the write request) a completion indicator. The method is suitable for use in bus architectures in which problems of data coherency may occur
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