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Improved scalable cpu for the coded design of software in highly dependent safety-relevant applications

机译:改进的可扩展CPU,用于高度依赖安全性相关应用程序中的软件编码设计

摘要

Some exemplary embodiments according to the invention relate to a single processor, which is configured such that it has configurable hardware, - expansions, which are arranged within a data path, which is configured such that it selectively, either coded data or original data, the two operating modes allow. In a high-power mode make possible the hardware - enlargements an increased processing bandwidth, in that the hardware - extensions for processing of enhanced data (that is to say additional original data) are used. In a safety - integrity mode make possible the hardware - extensions a parallel processing of encoded data simultaneously with the embodiment of a sbst by the processor, of a test program, and even test data is processed. For this reason, the single-channel processor to be a single core system, which selectively either high safety - integrity levels (for example, sil3) for safety-relevant applications or a high power for safety-relevant applications can be achieved not.
机译:根据本发明的一些示例性实施例涉及单个处理器,该单个处理器被配置为使其具有可配置的硬件,-扩展被布置在数据路径内,该扩展路径被配置为使得其选择性地对编码数据或原始数据进行配置。两种操作模式允许。在高功率模式下,使硬件-增大处理带宽成为可能,因为硬件-用于处理增强数据(即附加原始数据)的扩展。在安全-完整性模式下,使硬件-与处理器,测试程序,甚至测试数据的实施例同时扩展对编码数据的并行处理成为可能。因此,无法实现将单通道处理器作为单核系统,从而无法实现针对安全相关应用的高安全性-完整性级别(例如,sil3)或针对安全相关应用的高功率。

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