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COMPUTER TESTING METHOD, COMPUTER TESTING DEVICE AND COMPUTER TESTING PROGRAM

机译:计算机测试方法,计算机测试装置和计算机测试程序

摘要

PROBLEM TO BE SOLVED: To test a computer with efficient and advance restraint on the occurrence of exception interrupt and interrupt processing.;SOLUTION: A computer, when preparing an instruction string for test use, designates the output destination of instructions from a register other than an input-dedicated register into which execution results are not written. Also the computer, when preparing an instruction string for test use, designates for inputting of any instruction that may give rise to exception interrupt, such as floating point calculation or fixed point division, the input-dedicated register into which execution results are not written. The computer then sets as initial values for the input-dedicated register values that can prevent exception interrupt from occurring and executes the instruction string for test use, thereby conducting an operation test without allowing any exception interrupt to occur.;COPYRIGHT: (C)2012,JPO&INPIT
机译:解决的问题:要测试计算机以有效且先进地限制异常中断和中断处理的发生。;解决方案:计算机在准备供测试使用的指令字符串时,指定了寄存器的输出目的地,而不是寄存器输入专用寄存器,不将执行结果写入其中。同样,计算机在准备供测试使用的指令串时,还指定用于输入可能引起异常中断的任何指令,例如浮点计算或定点除法,即不写入执行结果的输入专用寄存器。然后计算机将输入专用寄存器的值设置为初始值,以防止发生异常中断并执行指令字符串以进行测试使用,从而进行操作测试而不允许发生任何异常中断。;版权所有(C)2012 ,JPO&INPIT

著录项

  • 公开/公告号JP2011253253A

    专利类型

  • 公开/公告日2011-12-15

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP20100125148

  • 发明设计人 ICHIKAWA FUMIO;INOUE TARIRU;

    申请日2010-05-31

  • 分类号G06F11/22;

  • 国家 JP

  • 入库时间 2022-08-21 17:39:53

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