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Manufacturing method of stacking unit chip, 3D stacked chip using unit chip and manufacturing method therefor
Manufacturing method of stacking unit chip, 3D stacked chip using unit chip and manufacturing method therefor
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机译：堆叠单元芯片的制造方法，使用该单元芯片的3d堆叠芯片及其制造方法
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摘要
PURPOSE: A unit chip for a laminate, a manufacturing method thereof, a three dimensional lamination chip thereof, and a manufacturing method thereof are provided to improve productivity and to simplify a processing process by using a dicing process used for the cutting of a wafer. CONSTITUTION: A plurality of grooves are formed along the cutting line of a silicon wafer(161). Each insulating part is formed by filling the insulating materials in the grooves. A plurality of electrode pads(140) are formed on the upper side of the silicon wafer. The insulating part is exposed in the lower side of the silicon wafer. A unit chip(160) for lamination is formed by cutting the silicon wafer.
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