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Method and system for hardware accelerator for implementing f9 integrity algorithm in WCDMA compliant handsets
Method and system for hardware accelerator for implementing f9 integrity algorithm in WCDMA compliant handsets
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机译：在兼容wcdma的手机中实现f9完整性算法的硬件加速器的方法和系统
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摘要
In a wireless communication system, a method and system for a hardware accelerator for implementing the f9 integrity algorithm in WCDMA compliant handsets are provided. Intermediate variables may be initialized in an integrity function and a first processing block of bits and at least one additional processing block of bits may be generated for the integrity function from a padded string generated from input variables. Values for a first and a second processing variable may be generated for each processing stage based on a corresponding processing block of bits and on immediately generated previous first and second processing values. The first processing value may be generated utilizing a KASUMI operation after an indication that an immediately previous generated first processing value is available. An authentication code may be generated based on a last of the second processing values and a modified integrity key.
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