首页> 外国专利> LAYOUT METHOD OF A GLOBAL SIGNAL LINE, PARTICULARLY FOR DISTRIBUTING GLOBAL SIGNAL LINES TO A REGION AROUND A PERIPHERAL REGION AND A NEAR REGION

LAYOUT METHOD OF A GLOBAL SIGNAL LINE, PARTICULARLY FOR DISTRIBUTING GLOBAL SIGNAL LINES TO A REGION AROUND A PERIPHERAL REGION AND A NEAR REGION

机译:全局信号线的布局方法,特别是用于将全局信号线分布到周边区域和附近区域的区域

摘要

PURPOSE: A layout method of a global signal line is provided to increase the layout area efficiency in a semiconductor memory device by distributing global signal lines through the use of a peripheral circuit region or a region adjacent to a peripheral circuit region.;CONSTITUTION: A layout method of a global signal line comprises the steps of: arranging some global signal lines(GIO) in a peripheral circuit region; and distributing and arranging the rest one in a certain region which is identical to a layer of the peripheral circuit region, wherein global signal lines are arranged at the peripheral circuit region.;COPYRIGHT KIPO 2010
机译:目的:提供一种全局信号线的布局方法,以通过使用外围电路区域或与外围电路区域相邻的区域来分布全局信号线,从而提高半导体存储器件中的布局面积效率。全局信号线的布局方法包括以下步骤:在外围电路区域中布置一些全局信号线(GIO);其余部分在与外围电路区域的一层相同的某个区域中分布和布置,其中全局信号线布置在外围电路区域。; COPYRIGHT KIPO 2010

著录项

  • 公开/公告号KR20090121471A

    专利类型

  • 公开/公告日2009-11-26

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20080047392

  • 发明设计人 KIM SUNG JIN;

    申请日2008-05-22

  • 分类号G11C7/10;G11C8/14;G11C7/18;

  • 国家 KR

  • 入库时间 2022-08-21 18:34:00

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