首页>
外国专利>
METHOD OF IMPLEMENTING IEC 61131-3 CONTROL SPECIFICATION THROUGH VHDL DESCRIPTION FOR MODELING, SIMULATION, SYNTHESIS AND FASTER GLITCH FREE CONTROL RESPONSE LOGIC CONFIGURATION ON FPGA
METHOD OF IMPLEMENTING IEC 61131-3 CONTROL SPECIFICATION THROUGH VHDL DESCRIPTION FOR MODELING, SIMULATION, SYNTHESIS AND FASTER GLITCH FREE CONTROL RESPONSE LOGIC CONFIGURATION ON FPGA
The present invention relates to a method of implementing an IEC 61131-3 control specification through VHDL description comprising the steps of (a) creating user interface for the control specification including languages covered under the IEC 61131-3, particularly ladder diagram, functional block diagram, sequential flow charts, structured text or instruction set listing; (b) generating a list of network interconnections with reference to the above referred languages; (c) generating logic equations using the aforesaid list of network interconnections generated at step (b) above; (d) generating VHDL code snippets in accordance with the IEC 61131-3; (e) generating VHDL code representing hardware with PLC functionality through said control specification by using the VHDL code snippets generated at step (d), the logic equations at step (c) and the network interconnections at step (b).
展开▼
