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EPI SUBSTRATE WITH LOW DOPED EPI LAYER AND HIGH DOPED SI SUBSTRATE LAYER FOR MEDIA GROWTH ON EPI AND LOW CONTACT RESISTANCE TO BACK-SIDE SUBSTRATE
EPI SUBSTRATE WITH LOW DOPED EPI LAYER AND HIGH DOPED SI SUBSTRATE LAYER FOR MEDIA GROWTH ON EPI AND LOW CONTACT RESISTANCE TO BACK-SIDE SUBSTRATE
The fabrication of seek-scan probe (SSP) memory devices involves processing on both-sides of a wafer. However, there are temperature restrictions on the mover circuitry side of the wafer and doping level constrains for either side of wafer. Using a low doped EPI layer on a highly doped substrate solves this issue and provides good STO growth.
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