首页> 外国专利> DRIVER CIRCUIT FOR DIFFERENTIALLY OUTPUTTING DATA FROM INTERNAL CIRCUITLY OF AN LSI TO THE OUTSIDE OF THE LSI

DRIVER CIRCUIT FOR DIFFERENTIALLY OUTPUTTING DATA FROM INTERNAL CIRCUITLY OF AN LSI TO THE OUTSIDE OF THE LSI

机译:用于将数据从LSI内部电路差异输出到LSI外部的驱动器电路

摘要

The present invention is to suppress a differential skew in differential data transmission. ; When the drain potential of the NMOS transistor (M0) (Vtt) is lower than the reference voltage (Vctrl), the output of the operational amplifier 4 rises, and an increase in the substrate potential of the NMOS transistors (M1, M2), the NMOS transistors (M1, M2 ) it is reduced on-resistance value. As a result, the drain potential of the NMOS transistor (M0) (Vtt) is raised. On the other hand, the NMOS transistor (M0) of the drain potential (Vtt), the reference potential (Vctrl) higher when the operational amplifier 4, the output is lowered, and the NMOS transistors (M1, M2) of the substrate potential is lowered, the NMOS transistors (M1 , the on-resistance value of M2) increases. As a result, the drain potential of the NMOS transistor (M0) (Vtt) is lowered. By this feedback action, the drain potential of the NMOS transistor (M0) (Vtt) becomes equal to the reference voltage (Vctrl). ; NMOS transistor, the operational amplifier
机译:本发明是为了抑制差分数据传输中的差分偏斜。 ;当NMOS晶体管(M0)的漏极电势(Vtt)低于参考电压(Vctrl)时,运算放大器4的输出升高,并且NMOS晶体管(M1,M2)的衬底电势增加,在NMOS晶体管(M1,M2)中,导通电阻值减小。结果,NMOS晶体管(M0)的漏极电势(Vtt)升高。另一方面,在运算放大器4中,漏极电位(Vtt)的NMOS晶体管(M0),基准电位(Vctrl)高,输出降低,基板电位的NMOS晶体管(M1,M2)高。如果降低,则NMOS晶体管(M1,M2的导通电阻值)增加。结果,NMOS晶体管(M0)的漏极电势(Vtt)降低。通过该反馈动作,NMOS晶体管(M0)的漏极电势(Vtt)变得等于参考电压(Vctrl)。 ; NMOS晶体管,运算放大器

著录项

  • 公开/公告号KR100882971B1

    专利类型

  • 公开/公告日2009-02-13

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20020051693

  • 发明设计人 요시카와다케후미;

    申请日2002-08-30

  • 分类号H03K17/00;

  • 国家 KR

  • 入库时间 2022-08-21 19:12:09

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