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METHOD AND SYSTEM FOR REDUCING TURN AROUND TIME OF COMPLICATED ENGINEERING CHANGE ORDERS AND ASIC DESIGN REUTILIZATION

机译:减少复杂工程变更单的周转时间的方法和系统及ASIC设计的实用化

摘要

Reducing turn around time of engineering change orders in ASIC re-spin design includes finding, on the fly, all corresponding boundary points of storage gate elements indicated by engineering change orders to be either added, deleted or renamed. Boolean equivalence tools are used between an old spin ASIC design and a new ASIC design netlist, as well as between the new ASIC design netlist and a new re-spin ASIC design to obtain failing boundary storage gate elements and perform one or more of adding, deleting or modifying or renaming all failing boundary storage gate elements, so they pass correspondence tests. Engineering change order scripts are automatically generated to indicate which storage logic gate elements are to be added, deleted or modified and the scripts are applied to the old ASIC design to obtain the new re-spin ASIC design, after which ASIC flow gate level fixes are applied to synthesized storage gate elements.
机译:减少ASIC重新设计中的工程变更单的周转时间包括动态查找由工程变更单指示的要添加,删除或重命名的存储门元件的所有对应边界点。在旧的自旋ASIC设计和新的ASIC设计网表之间,以及新的ASIC设计网表和新的重旋转ASIC设计之间使用布尔等价工具,以获取失效的边界存储门元素并执行一个或多个添加,删除或修改或重命名所有失败的边界存储门元素,以便它们通过对应测试。自动生成工程变更单脚本以指示要添加,删除或修改的存储逻辑门元素,并将这些脚本应用于旧的ASIC设计以获得新的重新设计ASIC设计,然后对ASIC流门级别进行修复。应用于合成存储门元件。

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