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Circuit simulation method, circuit simulation program, and circuit simulation apparatus for delay characteristic evaluation
Circuit simulation method, circuit simulation program, and circuit simulation apparatus for delay characteristic evaluation
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机译:用于延迟特性评估的电路仿真方法,电路仿真程序和电路仿真装置
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摘要
In delay characteristic evaluation of a logical circuit, there was the problem of underestimation of the output load compared with the actual output load. There is provided a simulation device including a simplification section that, simplifies the load circuit using a transistor with which a virtual control voltage source is connected, by specifying a transistor driven through the output terminal of the target circuit and connecting to the drain of this transistor the virtual control voltage source whereby the output potential of this transistor is varied in accordance with the gate potential of this transistor.
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