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Input circuit for determining logic state of integrated circuit input pin, has output unit that outputs input signal with determined voltage level at output terminal in period controlled by enable signal
Input circuit for determining logic state of integrated circuit input pin, has output unit that outputs input signal with determined voltage level at output terminal in period controlled by enable signal
The circuit (1) has a level-determining unit (10) for receiving an input signal (IN) at an input terminal of the circuit and for determining a voltage level of the input signal. An output unit (11) outputs the input signal with the determined voltage level at an output terminal in a period that is controlled by an enable signal. The output unit latches the determined voltage level of the input signal according to another enable signal, and outputs the input signal with the determined voltage level at the output terminal to serve as an output signal (OUT), during another period. An independent claim is also included for a method for determining logic states of an input circuit.
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