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Arithmetic and logic unit for e.g. microprocessor, for processing of data of specific bit width, has switch connecting carry bit input of partial arithmetic and logic unit with carry bit input of another partial arithmetic and logic unit
Arithmetic and logic unit for e.g. microprocessor, for processing of data of specific bit width, has switch connecting carry bit input of partial arithmetic and logic unit with carry bit input of another partial arithmetic and logic unit
The arithmetic and logic unit has a switch (5) arranged between two specific partial arithmetic and logic units in a carry bit line (23), where the switch selectively connects a carry bit input (31) of one of the two former partial arithmetic and logic units with a carry bit output (22) of the other partial arithmetic and logic unit or with a carry bit input (11) of a third specific partial arithmetic and logic unit. A comparator (10) has two inputs that are connected with data outputs of the former two partial arithmetic and logic units.
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