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Method and system to verify a circuit design by verifying consistency between two different language representations of a circuit design
Method and system to verify a circuit design by verifying consistency between two different language representations of a circuit design
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机译：通过验证电路设计的两种不同语言表示之间的一致性来验证电路设计的方法和系统
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摘要
A method to verify a circuit design may include applying a bounded model checking technique to a first computer language representation of the circuit design and to a second computer language representation of the circuit design. The method may also include determining a behavioral consistency between the first and second computer language representations.
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