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Area optimization of hardware for algorithms by optimizing sizes of variables of the algorithm
Area optimization of hardware for algorithms by optimizing sizes of variables of the algorithm
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机译：通过优化算法变量的大小来优化算法硬件的区域
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摘要
Described herein are methods and systems for optimizing area related to hardware implementation of algorithms. The algorithms may be related to functionality of an embedded system, for instance. System functionality may be initially implemented in software and converted to hardware implementation. Prior to implementing system functionality in actual hardware, algorithms for selected system functionality or desirable all system functionality may be evaluated to determine values attained by selected variables or desirably all the variables comprised therein. In one embodiment, a probe may applied to the original software code to determine a maximum value and a minimum value corresponding to each of the variables of the algorithm (or at least one such variable) may be tracked across one or more invocations of functions (or other code components) of the algorithm comprising such variables. Based on such tracked values, a minimum size (e.g., in bit-width), for each of the variables, needed to express the various values attained by the variables may be determined. The original software code implementing system functionality may then be modified to declare or otherwise specify an optimal (e.g., the minimum bit-width needed to express values attained) bit-width, which can result in reduced area for a hardware implementation.
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