Method of forming buried isolation regions in semiconductor substrates and semiconductor devices with buried isolation regions

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  机译： 在半导体衬底中形成掩埋隔离区的方法以及具有掩埋隔离区的半导体器件

• 4. Semiconductor device having a buried isolation region and method of forming a buried isolation region of the semiconductor substrate [P] . 日本专利： JP5064689B2 . 2012-10-31

  机译： 具有掩埋隔离区的半导体器件和形成半导体衬底的掩埋隔离区的方法

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  机译： 通过形成掺杂的多晶或非晶半导体的掩埋区来形成PN结隔离区的方法

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