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Master slave flip flop for ternary thrust register based on ternary and quaternary logic has two ternary flip flops connected to inverter and four potential levels and logic numbers
Master slave flip flop for ternary thrust register based on ternary and quaternary logic has two ternary flip flops connected to inverter and four potential levels and logic numbers
A master-slave flip-flop for a ternary thrust register (32) based on ternary/quaternary logic comprises two ternary flip-flops (31) with driver, two NOR gates and a P-binary OR gate, and an inverter. Four potentials give logic numbers 0,1,2,3. A clock input (C) controls one flip-flop (31) directly and the other via the inverter and a reset signal also feeds this.
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