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Logic basic cell e.g. field programmable gate array, for use in logic device, has four data signal inputs selectable by respective n-MOS selection transistors, which are provided between respective signal inputs
Logic basic cell e.g. field programmable gate array, for use in logic device, has four data signal inputs selectable by respective n-MOS selection transistors, which are provided between respective signal inputs
The cell has data signal inputs (103-106) selectable by respective n-MOS selection transistors (108-111). The transistor (108) is provided between the inputs (103, 104) and transistor (109) is in between the inputs (103, 106). The transistor (110) is provided between the inputs (104, 105) and transistor (111) is in between the inputs (105, 106). Logic function of two data signals is provided as output signals at a data signal output. An independent claim is also included for a logic device comprising a logic basic cell arrangement with a logic basic cell.
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