首页> 外国专利> MULTI-PORT MEMORY DEVICE FOR REDUCING THE LOAD OF GLOBAL DATA BUS BY INCLUDING THE FIRST TO THE FOURTH GLOBAL DATA BUS IN A ROW DIRECTION BETWEEN PORTS AND BANKS

MULTI-PORT MEMORY DEVICE FOR REDUCING THE LOAD OF GLOBAL DATA BUS BY INCLUDING THE FIRST TO THE FOURTH GLOBAL DATA BUS IN A ROW DIRECTION BETWEEN PORTS AND BANKS

机译:多端口内存设备,用于通过在端口和行之间的行方向上包含第一到第四条全局数据总线来减少全局数据总线的负载

摘要

PURPOSE: A multi-port device is provided to reduce the loading of a global data bus and to secure the layout efficiency, packaging easiness and expandability by having the first to the fourth global data bus in a row direction between ports and banks. CONSTITUTION: A multi-port device comprises a number of memory cells; plural row decoders(RDEC); a multiplicity of banks(bank0-bank15) which are arranged in a row direction in each quadrant dividing the core area in four; an intermediating unit(100) between the first/the third quadrant and the second/the fourth quadrant to divide the core area in two, for intermediating each component of the memory device by using internal command signals, internal address signals and control signals; plural ports(port0-port7) at each edge of the quadrants for communicating with different target devices independently; the first to the fourth global data bus(GIO_UL, GIO_UR, GIO_DL, GIO_DR) between banks and ports in a row direction, for transmitting data in parallel; the first and the second data bus connection unit(PR_U, PR_D) between two adjacent global data buses, for selectively connecting the two adjacent global data buses, plural transfer buses(TB) arranged in a column direction of each bank, for transmitting data within the banks; plural transfer bus connection units(TG) between two adjacent banks in a column direction, for selectively connecting the transfer buses(TB) of the two adjacent banks; plural bus connection units(TL) between each bank and corresponding global data bus, for exchanging data between the corresponding transfer bus(TB) and the corresponding global data bus; plural data transmission units(TR) between each port and the corresponding global data bus, for transmitting/receiving data.
机译:用途:提供了一种多端口设备,以通过在端口和存储区之间的行方向上设置第一至第四全局数据总线,来减少全局数据总线的负载并确保布局效率,封装易用性和可扩展性。组成:一个多端口设备包括多个存储单元。多个行解码器(RDEC);在每个象限中以行方向排列的多个存储体(bank0-bank15)将核心区域分为四部分;在第一/第三象限和第二/第四象限之间的中间单元(100),将核心区域一分为二,用于通过使用内部命令信号,内部地址信号和控制信号来中间化存储装置的每个组件;象限的每个边缘有多个端口(port0-port7),用于分别与不同的目标设备通信;排和端口之间的第一至第四全局数据总线(GIO_UL,GIO_UR,GIO_DL,GIO_DR)在行方向上并行传输数据;在两个相邻全局数据总线之间的第一和第二数据总线连接单元(PR_U,PR_D),用于选择性地连接两个相邻全局数据总线,在每个存储体的列方向上排列的多个传输总线(TB),用于在内部传输数据银行;沿列方向在两个相邻排之间的多个传输总线连接单元(TG),用于选择性地连接两个相邻排的传输总线(TB);每个存储体和相应的全局数据总线之间的多个总线连接单元(TL),用于在相应的传输总线(TB)和相应的全局数据总线之间交换数据;每个端口和相应的全局数据总线之间的多个数据传输单元(TR),用于传输/接收数据。

著录项

  • 公开/公告号KR20050022855A

    专利类型

  • 公开/公告日2005-03-08

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20030092375

  • 发明设计人 PARK BYUNG IL;SHIN BEOM JU;

    申请日2003-12-17

  • 分类号G11C7/10;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:44

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