首页> 外国专利> METHOD FOR FABRICATING FLASH MEMORY DEVICE AND FLASH MEMORY DEVICE FABRICATED THEREBY TO IMPROVE SCATTERING OF ERASE THRESHOLD VOLTAGE BETWEEN CELLS OF FLASH MEMORY DEVICE AND PREVENT BITLINE CONTACT PLUG AND WORDLINE PATTERNS PASSING BY BOTH SIDES OF SUCH BITLINE CONTACT PLUG FROM BEING ELECTRICALLY SHORT-CIRCUITED ON CELL ACTIVE REGION AT BOTH SIDES OF SOURCE ACTIVE REGION

METHOD FOR FABRICATING FLASH MEMORY DEVICE AND FLASH MEMORY DEVICE FABRICATED THEREBY TO IMPROVE SCATTERING OF ERASE THRESHOLD VOLTAGE BETWEEN CELLS OF FLASH MEMORY DEVICE AND PREVENT BITLINE CONTACT PLUG AND WORDLINE PATTERNS PASSING BY BOTH SIDES OF SUCH BITLINE CONTACT PLUG FROM BEING ELECTRICALLY SHORT-CIRCUITED ON CELL ACTIVE REGION AT BOTH SIDES OF SOURCE ACTIVE REGION

机译:一种制造闪存存储器的方法和由此制造的闪存存储器,以改善闪存器件的电池与防止位线接触的插头和字线图案之间的擦除阈值电压的散射,这两个方面一直是持续的两个源活动区域的活动区域

摘要

PURPOSE: A method for fabricating a flash memory device is provided to improve scattering of an erase threshold voltage between cells of a flash memory device and prevent a bitline contact plug and wordline patterns passing by both sides of such bitline contact plug from being electrically short-circuited on a cell active region at both sides of a source active region by making wordline patterns maintain a straight line type even in the periphery of a common source contact hole. CONSTITUTION: An isolation layer is formed in a predetermined region of a semiconductor substrate to define a plurality of parallel cell active regions and at least one source active region between the cell active regions. The cell active regions are covered with a floating gate pattern exposing the source active region. Impurity ions are selectively implanted into the source active region to form a buried diffusion layer. A plurality of parallel wordline patterns(420) cross the upper portions of the cell active regions and the source active regions, having a straight line type. Drains are formed in the cell active regions adjacent to one sidewalls of the wordline patterns while sources are formed in the cell active regions adjacent to the other sidewalls of the wordline patterns.
机译:目的:提供一种制造闪存装置的方法,以改善闪存装置的单元之间的擦除阈值电压的散射,并防止通过该位线接触插头的两侧的位线接触塞和字线图案电短路。通过使字线图案即使在公共源极接触孔的外围也保持直线型而在源极有源区两侧的单元有源区上进行电路连接。构成:隔离层形成在半导体衬底的预定区域中,以定义多个平行的单元有源区和单元有源区之间的至少一个源极有源区。单元有源区覆盖有暴露源极有源区的浮栅图案。杂质离子被选择性地注入到源极有源区中以形成掩埋扩散层。多个平行字线图案(420)跨过单元有源区和源极有源区的上部,具有直线型。在与字线图案的一个侧壁相邻的单元有源区中形成漏极,而在与字线图案的另一个侧壁相邻的单元有源区中形成源极。

著录项

  • 公开/公告号KR20050017485A

    专利类型

  • 公开/公告日2005-02-22

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20030056260

  • 发明设计人 LEE WOOK HYOUNG;

    申请日2003-08-13

  • 分类号H01L21/8247;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:52

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