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Piezoelectric element unit lamination arrangement has internal electrode layer whose electrical potential difference with adjacent electrode layer is less than half of average electrical potential difference of electrode layer
Piezoelectric element unit lamination arrangement has internal electrode layer whose electrical potential difference with adjacent electrode layer is less than half of average electrical potential difference of electrode layer
The average electrical potential difference of each internal electrode layer (153) of each piezoelectric element unit (15) and the electrical potential difference of adjacent internal electrode layers interposing a junction layer (17) are set to V1 and V such that V is less than half of V1. An independent claim is also included for piezoelectric element unit lamination arrangement manufacturing method.
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