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Digital temperature sensor (DTS) system to monitor temperature in a memory subsystem

机译:数字温度传感器(DTS)系统可监视内存子系统中的温度

摘要

A memory subsystem package has a memory controller interface ASIC (application specific integrated circuit) and a plurality of memory modules. The ASIC has a bi-directional serial protocol i2C communication bus to off chip drivers for monitoring temperature and for adjusting the environment surrounding the package by controlling fans using fan switches and variable voltage controls. In addition there is provided an Alternating Current Built in Self Test (AC BIST) with variable data receiver voltage reference for performing high-speed AC memory subsystem self-test for that ASIC enabling writing of pseudo-random patterns to memory, reading them back and comparing the expected results at hardware speeds. Vref can be made to vary across its allowable range during AC self test to provide improved coverage. The system monitors Vddq during normal system operation using an ADC. The system varies Vref as a function of Vddq, using a combination of a DAC and ADC. The system varies Vref as a function of Vddq, such that Vref=1/m*Vddq+OFFSET, where m can be 1, 2, 4, or 8, and where OFFSET can be positive or negative ranging from 1/n*Vddq to n−1/n*Vddq, where n is the voltage granularity of the DAC.
机译:存储子系统封装具有存储控制器接口ASIC(专用集成电路)和多个存储模块。 ASIC具有双向串行协议i2C通信总线,可通过片外驱动器监视温度并通过使用风扇开关和可变电压控件控制风扇来调节封装周围的环境。此外,还提供了带有可变数据接收器参考电压的内置交流自测(AC BIST),用于对该ASIC进行高速AC存储器子系统自检,从而能够将伪随机模式写入存储器,将其读回并写入。比较硬件速度下的预期结果。在AC自检期间,可以使Vref在其允许范围内变化,以提供更好的覆盖范围。系统在正常系统运行期间使用ADC监视Vddq。系统使用DAC和ADC的组合将Vref作为Vddq的函数进行变化。系统将Vref作为Vddq的函数而变化,以使Vref等于1 / m * Vddq + plusset,其中m可以为1、2、4或8,并且OFFSET可以为正或负,范围为1 / n * Vddq为n /负1 / n * Vddq,其中n是DAC的电压粒度。

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