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Architecture for performing fast fourier transforms and inverse fast fourier transforms
Architecture for performing fast fourier transforms and inverse fast fourier transforms
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机译:用于执行快速傅立叶变换和逆快速傅立叶变换的体系结构
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摘要
A processor for performing fast Fourier-type transform operations is described. Butterfly operations are performed on input values a prescribed number of times, a butterfly operation comprising three multiply operations and a plurality of add operations.
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