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METHOD OF REDUCING RIE LAG FOR DEEP TRENCH SILICON ETCHING
METHOD OF REDUCING RIE LAG FOR DEEP TRENCH SILICON ETCHING
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机译：减少深沟槽硅刻蚀的RIE滞后的方法
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摘要
How to minimize: (1 i.e., 30) In the DRAM having RIE lag (i.e., normal to the ion flux from the bottom of the deep trench (DT) that occur during the formation of the trench opening using the side wall film deposition) high aspect ratio this is explained. This method is to form a passivation film to the extent necessary to prevent isotropic etching of the substrate, to keep the profile and shape of DT required in the substrate. RIE process described provides a portion DT is formed by etching the substrate to obtain a predetermined depth. A passivation film to the opening in the near range of the deep trench is able to grow to a certain thickness. Alternatively, the passivation film is removed in a non-RIE etching processes. In a non-RIE process for removing such films, hydrofluoric acid can be wet-etched to a vapor phase (vapor phase) by chemical or alternatives such as fluoride acid anhydride (non-buffer or buffer), deionized water chemistry. The film thickness by controlling the aspect ratio it is possible to obtain a desired depth DT against the large structure.
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