Wiring method for semiconductor integrated circuit and computer product using maximum gap between times

• 1. 集成电路以及利用其测试半导体器件的方法 [P] . 中国专利： CN104979015B . 2020.10.13
• 2. 用于硬掩模的组合物、利用其形成图案的方法以及包括所述图案的半导体集成电路装置 [P] . 中国专利： CN104024941B . 2017.11.28
• 3. Method of wiring semiconductor integrated circuit, semiconductor integrated circuit, and computer product [P] . 美国专利： US6769106B2 . 2004-07-27

  机译： 半导体集成电路的布线方法，半导体集成电路以及计算机产品

• 4. Method of wiring semiconductor integrated circuit, semiconductor integrated circuit, and computer product [P] . 美国专利： US2003014726A1 . 2003-01-16

  机译： 半导体集成电路的布线方法，半导体集成电路以及计算机产品

• 5. CIRCUIT BLOCK, SEMICONDUCTOR INTEGRATED CIRCUIT, ARRANGEMENT AND WIRING DESIGN DATA OF CIRCUIT BLOCK RECOGNIZABLE BY COMPUTER, AND ARRANGEMENT AND WIRING DESIGN DATA OF SEMICONDUCTOR INTEGRATED CIRCUIT RECOGNIZABLE BY COMPUTER [P] . 日本专利： JP2004047803A . 2004-02-12

  机译： 电路块，半导体集成电路，计算机可识别的电路块的布置和布线设计数据以及计算机可识别的集成电路集成电路的布置和布线设计数据

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• 1. Preface to the Special Issue on Semiconductor Optoelectronic Integrated Circuits [J] . Wei Wang ,Lingjuan Zhao ,Dan Lu . 半导体学报：英文版 . 2021,第4期
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