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Cell placement in integrated circuit chips to remove cell overlap, row overflow and optimal placement of dual height cells
Cell placement in integrated circuit chips to remove cell overlap, row overflow and optimal placement of dual height cells
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机译：集成电路芯片中的单元放置可消除单元重叠，行溢出和双高度单元的最佳放置
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摘要
Cell overlap is removed from rows during a cell placement procedure for an integrated circuit chip. The rows are partitioned into subrows so that cells in each subrow have a common characteristic vector. Cell overflow is removed from each of the subrows by moving a cell of an overflowed row or exchanging two cells, at least one of which is in the overflowed subrow. The half-cells of the dual height cells are moved to cell positions in a suitable pair of rows based on a calculated movement penalty. The movement is accomplished to align the half-cells and minimize the penalty. In preferred embodiments, the process is carried out by a computer under control of a computer program.
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