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Memory controller with 1amp;times;/Mamp;times; read capability
Memory controller with 1amp;times;/Mamp;times; read capability
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机译：具有1＆times; / M＆times;的内存控制器读取能力
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摘要
Methods and apparatus for receiving data from memory, the data being associated with a strobe, are disclosed herein. In general, the methods and apparatus provide a memory controller with a means for receiving data at different rates. Data may be received by a memory controller at different rates because, for example, the memory controller is used in environments where it attaches directly to a number of memory modules, and/or in environments where it attaches to a number of memory modules via an intermediary chip. The intermediary chip may, for example, include multiplexers which receive data from two or more banks of memory modules and then multiplex the data into one or more data streams which are then transmitted to the memory controller at twice the rate which the memory modules in either bank could transmit data to the memory controller.
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