首页> 外国专利> Power semiconductor switching devices, power converters, integrated circuit assemblies, integrated circuitry, power current switching methods, methods of forming a power semiconductor switching device, power conversion methods, power semiconductor switching device packaging methods, and methods of forming a power transistor

Power semiconductor switching devices, power converters, integrated circuit assemblies, integrated circuitry, power current switching methods, methods of forming a power semiconductor switching device, power conversion methods, power semiconductor switching device packaging methods, and methods of forming a power transistor

机译:功率半导体开关器件,功率转换器,集成电路组件,集成电路,功率电流开关方法,形成功率半导体开关器件的方法,功率转换方法,功率半导体开关器件封装方法以及形成功率晶体管的方法

摘要

Power semiconductor switching devices, power converters, integrated circuit assemblies, integrated circuitry, power current switching methods, methods of forming a power semiconductor switching device, power conversion methods, power semiconductor switching device packaging methods, and methods of forming a power transistor are described. One exemplary aspect provides an integrated circuit assembly including a semiconductive substrate comprising a plurality of field effect transistors having electrically coupled sources and electrically coupled drains comprising regions of the substrate adjacent to a surface of the substrate, and wherein the electrically coupled sources and the electrically coupled drains are collectively configured to conduct power currents in excess of one Ampere; and a package having a plurality of source contacts and a plurality of drain contacts configured to couple with the electrically coupled sources and the electrically coupled drains of the semiconductive substrate, and wherein the source contacts and the drain contacts are provided adjacent to the surface of the package.
机译:描述了功率半导体开关器件,功率转换器,集成电路组件,集成电路,功率电流开关方法,形成功率半导体开关器件的方法,功率转换方法,功率半导体开关器件封装方法以及形成功率晶体管的方法。一个示例性方面提供了一种集成电路组件,其包括半导体衬底,该半导体衬底包括具有电耦合源极和包括衬底的与衬底表面相邻的区域的电耦合漏极的多个场效应晶体管,并且其中,电耦合源极和电耦合漏极被电耦合。漏极共同配置为传导超过一安培的电流;封装具有多个源极触点和多个漏极触点,其被配置为与半导电衬底的电耦合的源极和电耦合的漏极耦合,其中,源极触点和漏极触点被设置成与半导体衬底的表面相邻。包。

著录项

  • 公开/公告号US2002195662A1

    专利类型

  • 公开/公告日2002-12-26

    原文格式PDF

  • 申请/专利权人 EDEN RICHARD C.;SMETANA BRUCE A.;

    申请/专利号US20020201122

  • 发明设计人 RICHARD C. EDEN;BRUCE A. SMETANA;

    申请日2002-07-22

  • 分类号H01L27/01;H01L27/12;

  • 国家 US

  • 入库时间 2022-08-22 00:09:32

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