首页> 外国专利> All dual damascene oxide etch process steps in one confined plasma chamber

All dual damascene oxide etch process steps in one confined plasma chamber

机译:一个密闭等离子体室中的所有双镶嵌氧化蚀刻工艺步骤

摘要

The present invention reveals a semiconductor dual damascene etching process, which uses a confined plasma etching chamber to integrate all dual damascene steps such as via hole etching, photoresist stripping and barrier layer removal which originally performed in various reactors as a continuous procedure in the confined plasma chamber. The confined plasma chamber including a confinement ring surrounding a wafer and an anti-etching upper electrode plate performs the steps mentioned above under clean mode. The present invention can not only reduce the time period required by the semiconductor dual damascene process but also greatly reduce the manufacturing cost.
机译:本发明揭示了一种半导体双大马士革刻蚀工艺,该工艺使用密闭等离子体刻蚀室来集成所有双大马士革步骤,例如通孔刻蚀,光致抗蚀剂剥离和阻挡层去除,其最初在密闭等离子体中作为连续步骤在各种反应器中进行。室。包括围绕晶片的约束环和抗蚀刻上电极板的约束等离子体室在清洁模式下执行上述步骤。本发明不仅可以减少半导体双大马士革工艺所需的时间,而且可以大大降低制造成本。

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