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The use of a planarization - dielectric layer to the reduction of the buckling of effect, which in the case of a chemically - mechanical machining occurs, which in the production of insulating regions in the form of a small amount is inserted deeper trenches
The use of a planarization - dielectric layer to the reduction of the buckling of effect, which in the case of a chemically - mechanical machining occurs, which in the production of insulating regions in the form of a small amount is inserted deeper trenches
It has been a process for the production of filled with silicon oxide regions in the form of an insulation with a small amount of deep trenches (sti) in a semiconductor substrate have been developed, wherein a layer of dispose borphosphorsiliktatglas (bpsg) for leveling from the filled with silicon oxide sti - regions of different widths is used. After the complete filling of all the sti - shapes with a silicon oxide layer, which, using a plasma of high density (hdp) is produced, which leads to a topography, which is not flat, the upper surface of hdp - silicon oxide layer, a bpsg - layer is deposited. Then, a rise machining is carried out, which leads to a topography of a flat upper surface of the molten bpsg - layer leads. A chemically - mechanical polishing machining, moves is then used for this purpose, in order to the plane, molten bpsg - layer to be removed, as well as parts of the underlying hdp - silicon oxide, from the upper surface of a silicon nitride - barrier layer, which leads to a topography with a flat upper surface in the case of all filled with silicon oxide insulating regions.
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