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Method and system for determining the fault structures of semiconductor wafers produced in the case of an automated semiconductor wafers - acceptance check

机译：确定在自动化半导体晶片情况下生产的半导体晶片的故障结构的方法和系统-验收检查

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摘要

The sampling of one lot of wafer is done and N test results are output and displayed as vectors. After displaying the defective fraction of i-th test item, the N-dimensional test result vector is multiplied by N asterisk N conversion matrix and N-th defective pattern is obtained. The ratio of defective pattern is displayed to obtain the defective pattern vector. An Independent claim is also included for defective pattern identification method.

机译：完成了一批晶圆的采样，输出了N个测试结果并将其显示为矢量。在显示第i个测试项目的缺陷分数之后，将N维测试结果向量与N个星号N转换矩阵相乘，从而获得第N个缺陷图案。显示缺陷图案的比率以获得缺陷图案矢量。对于缺陷图案识别方法，还包括独立索赔。

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公开/公告号DE19906396C2

专利类型
公开/公告日2002-02-07

原文格式PDF
申请/专利权人 MOSEL VITELIC INC. HSINCHU TW;PROMOS TECHNOLOGIES INC. HSINCHU TW;SIEMENS AG 80333 MÜNCHEN DE;
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申请/专利号DE1999106396
发明设计人 CHA CHIA-YEN HSINCHU TW;
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申请日1999-02-16
分类号H01L21/66;
国家 DE
入库时间 2022-08-22 00:27:52

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